西安交通大学教师个人主页 张 斌

[14] Lei Rao, Bin Zhang, Jizhong Zhao, Hardware implementation of reconfigurable separable convolution, IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2018, 接收.

[13] 董辉, 张斌. 基于显著图的可变模板形态学去雾方法, 自动化学报, 接收.

[12] Bin Zhang, Chen Zhao, Kuizhi Mei, Jizhong Zhao, and Nanning Zheng, Hierarchical and Parallel Pipelined Heterogeneous SoC for Embedded Vision Processing, IEEE Transactions on Circuits and Systems for Video Technology, 28(6), pp. 1434-1444, Jun. 2018.

[11] Bin Zhang and Jizhong Zhao, Hardware Implementation for Real-time Haze Removal, IEEE Transactions on Very Large Scale Integration Systems, 25(3), pp.1188-1192, Mar. 2017.

[10] Xiao Zhou, Peilin Jiang, Xuetao Zhang, Bin Zhang, Fei Wang, The Measurement of Human Height Based on Coordinate Transformation, International Conference on Intelligent Computing 2016.

[9] Bin Zhang and Jizhong Zhao, Elementary Function Computing Method for Floating-Point Unit, Journal of Signal Processing Systems, 88(3), pp. 311-321, Mar. 2017.

[8] Lei Rao, Bin Zhang, Jizhong Zhao. Hardware Implementation of Reconfigurable 1D Convolution, Journal of Signal Processing Systems, 82(1), pp. 1-16, Jan. 2016.

[7] Bin Zhang, Kuizhi Mei, Jizhong Zhao. Matrix computing coprocessor for an embedded system. Microprocessors and Microsystems, 39(7), pp. 444-456, Oct. 2015.

[6] Bin Zhang, Kuizhi Mei, Nanning Zheng. Coarse-grained Dynamically Reconfigurable Processor for Vision Pre-Processing. Journal of Signal Processing Systems, 79(1), pp. 45-61, Apr. 2015.

[5] Bin Zhang, Kuizhi Mei, Nanning Zheng. Reconfigurable Processor for Binary Image Processing. IEEE Transactions on Circuits and Systems for Video Technology, 23(5), pp. 823-831, May 2013.

[4] Bin Zhang, Nanning Zheng, Kuizhi Mei. A dynamically reconfigurable architecture for vision pre-processor. Ph.D. Research in Microelectronics and Electronics(PRIME), pp. 1-4, 2010.

[3] 张斌, 梅魁志, 郭青. 仿生物视觉的非均匀采样方法及其硬件设计,西安交通大学学报(自然科学版), 2010, 44(6): 99-103.

[2] Kuizhi Mei, Bin Zhang and Chenyang Ge. A Hierarchical and Parallel SoC Architecture for Vision Processor. IEICE Electronics Express, 2009, 19(6):1380-1386.

[1] 梅魁志, 李国辉, 张斌. 一种面向写穿透Cache 的写合并设计及验证，西安交通大学学报(自然科学版)，2010, 44(4):1-4.