High Dimensional Bayesian Optimization for Analog Integrated Circuit Sizing Based on Dropout and gm/ID Methodology
- 发布时间:2025-04-30
- 论文名称:High Dimensional Bayesian Optimization for Analog Integrated Circuit Sizing Based on Dropout and gm/ID Methodology
- 发表刊物:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- 合写作者:Chen Chen; Hongyi Wang; Xinyue Song; Feng Liang; Kaikai Wu; Tao Tao
- 是否译文:否
- 发表时间:2022-01-31
- 合写作者:Chen Chen; Hongyi Wang; Xinyue Song; Feng Liang; Kaikai Wu; Tao Tao