Basic Information

Basic Information

Contact Information

陕西省西安市咸宁西路28号西安交通大学电信学院
邮编:710049

(1.)Basic Information

Lei Shaochong. I got my Phd degree and MSE degree from Xi'an Jiaotong Univ. . The former was attained from the Instisute of Microelectronics of the School of Electroncis and Iinformation, and the latter was attained from the Institute of Automatic Control.

Documents and Media

There are no documents or media files in this folder.
Folders
Documents
{title}
Right Now by
  • thumbnail
    Right Now by

    {title}

  • (5.)Scientific Research

    (7.)Contact

    Shaochong Lei
    School of Eletronics and Information
    Xi'an Jiaotong University
    Xi'an, Shaanxi
    710049
    China
    Emali: leisc at mail.xjtu.edu.cn

    Research Fields

    Paper

    No entries were found.
    Paper Name Author Publication/Completion Time Magazine Name
    An Optimized Seed-based Pseudo-random Test Pattern Generator: Theory and Implementation Sun Haijun(孙海珺), Zeng Yongjia(曾永甲), Li Pu(李璞), Lei 2011-12-17 JETTA
    Design of Four-wave Oscillating Cellular-Neural-Network Zhang Guohe(张国和), Lei SC, M Tanaka, BG Kumar 2011-06-28 IEICE
    A unified solution to reduce test power and test volume for Test-per-scan schemes Shaochong Lei, Zhen Wang(王震), Zeye Liu(刘泽叶) 2010-09-09 IEICE Electronics Express
    A Low Power Test Pattern Generator for BIST Lei SC, Feng L(梁峰), Liu ZY(刘泽叶), Wang XY(王晓瑛) 2010-05-04 IEICE Trans. Electronics
    Explore the Limits to Reduce Test Power Lei SC, Jiang ZW, and D M H Walker 2008-10-31 IEEE D3T-2008
    A Class of SIC Circuits: Theory and Application in BIST Design Lei SC, Hou XY(侯学彦), Shao ZB(邵志标), Liang Feng 2008-01-03 IEEE Trans.Circuits and System II

    Patent

    No entries were found.
    Patent Name Application Number xjtu.gr.patent.type Application Date
    一种多维相似压缩电路 Invention 2015.04.20
    去头去尾移位电路 Invention 2013.10.28
    掐头去尾移位补值电路 Invention 2013.10.28
    一种计1器电路 201310488850.6 Invention 2013.10.18
    一种掐头去尾电路 201310488789.5 Invention 2013.10.18
    一种平方电路 201310488728.9 Invention 2013.10.18
    一种单线串行总线协议及转换电路 201310488846.X Invention 2013.10.18
    数字集成电路测试数据的压缩生成方法 201010256212.8 Invention 2010.08.18
    一种集成电路的测试图形生成器及其测试方法 201010103360.6 Invention 2010.01.29
    一种集成电路的测试图形生成器及其测试方法 200910023396 Invention 2009.07.21
    集成电路的复合扫描单元 200910021873.X Invention 2009.04.03
    一种集成电路的测试图形生成器 200910021525.2 Invention 2009.03.13