Our Biomedical Front-end Research Work was presented at 2018 IEEE International Conference on Integrated Circuits, Technologies and Applications.

Abstract—This paper presents the design of a low power biomedical front-end (BFE) for Electroencephalogram (EEG) /Electrocorticography (ECoG) acquisition applications through 0.18 μm CMOS process. By balancing the design constrains of total input-referred noise of the BFE, gain and power of multi-channel LNAs, and resolution of the ADC, the BFE achieves power consumption of 6.2 μW per channel, for an 8-channel design. In addition, a 12-bit SAR ADC with data weighted averaging (DWA) calibrations is proposed to alleviate the design burdens in the low noise amplifier (LNA).