Journal Papers:

• 79. B. Liu et al., "Singularity Analysis and Avoidance of Autocorrelation-Based Background Timing-Skew Calibration for Time-Interleaved ADCs," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Early Access, doi: 10.1109/TVLSI.2026.3701362.
  

• 78. Zhiming Li, Lei Dong, Quan Sun, Yuwei Wang, Hongrui Luo, Ruidong Li, Jie Zhang, Huanhuan Qi, Xiaofei Wang, Hong Zhang, A low-noise readout ASIC with nonlinearity compensated pseudo-differential charge-balanced CV converter for MEMS capacitive accelerometers, Microelectronics Journal, Volume 175, 2026, 107286.

• 77. Yuming Li, Cheng Yang, Ruichao Guo, Bo Wang, Zhiming Li, Youxiang Chen, Lichenxi Zhang, Junyao Ji, Rui Pan, Jie Zhang, Hong Zhang, A 24-bit high-linearity data acquisition system with a 4th-order ΔΣ ADC featuring on-chip pre-charge buffers for driving requirement relaxation, Measurement, Volume 279, 2026, 121728.

• 76. A. Sun, J. Li, C. Dai, J. Zhang and H. Zhang, "A Compact Low-Distortion Sinusoidal Current Generator With 2-bit/128-Sample Optimum ΔΣ-Modulated LUT for Bio-Impedance Measurement," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 73, no. 6, pp. 613-617, June 2026.

• 75. R. Wang, Z. Tian, C. Li, Z. Rao, H. Zhang and Y. Wang, "A 24–32-GHz In-Band Full-Duplex T/R Front End With Electrical Balance Duplexer in 65-nm CMOS," in IEEE Microwave and Wireless Technology Letters, vol. 36, no. 4, pp. 629-632, April 2026.

• 74. Junyao Ji, Peiyu Li, Bo Wang, Youxiang Chen, Jie Shao, Xiaojie Fan, Mingyuan Ye, Yan Xue, Yingdan Jiang, Jie Zhang, Ruitao Wang, Xiaofei Wang, Hong Zhang, A 5-GSPS continuous-time ΔΣ modulator with nested feedforward compensation OTA and resistive−grounded current-steering DAC achieving 225-MHz bandwidth and 68.5-dB SNR,  Microelectronics Journal, Volume 165, 2025, 106854.

• 73. N. Li et al., "A 10-Bit 500-MS/s Pipelined SAR ADC With Nonlinearity-Compensated Open-Loop Amplifier and Parallel Conversion Through Comparator Reusing," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 72, no. 2, pp. 354-358, Feb. 2025.

• 72. B. Cheng et al., "A 2–2.65-GHz Dual-Core VCO With High- Linearity Varactor Array and High-Q Switched Capacitor Bank Achieving −128 dBc/Hz Phase Noise at 1 MHz Offset," in IEEE Microwave and Wireless Technology Letters, vol. 35, no. 12, pp. 2029-2032, Dec. 2025.
  

• 71. Zhiming Li, Lei Dong, Quan Sun, Yang Chen, Yuming Li, Jie Zhang, Huanhuan Qi, Xiaofei Wang, Hong Zhang, A 107.5-dB dynamic range 402-μW event-driven dynamic zoom ADC with voice activity detection function for audio applications, Microelectronics Journal, Volume 159,  2025, 106654.

• 70. Yuming Li, Shuai Peng, Weiliang Peng, Yang Chen, Zhiming Li, Jie Zhang, Xiaofei Wang, Hong Zhang, A 10-kHz BW 104.3-dB DR discrete-time delta-sigma modulator with ring-amplifier-based integrator, Microelectronics Journal, Volume 144, 2024, 106076.

• 69. B. Liu et al., "Artificial Neural Network Based Calibration for a 12 b 250 MS/s Pipelined-SAR ADC With Ring Amplifier in 40-nm CMOS," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 71, no. 11, pp. 5067-5080, Nov. 2024.
  

• 68. Yang Chen, Binyu Cai, Changhuan Chen, Weiliang Peng, Quan Sun, Xiaofei Wang, Hong Zhang, A 2-2 MASH ΔΣ ADC with fast-charge CLS input buffer and dual double sampling achieving 103.3-dB SNDR and ±2.5-ppm/FSR INL, Microelectronics Journal, Volume 144, 2024, 106092

• 67. Hongrui Luo, Zihao Jiao, Yang Chen, Jie Zhang, Quan Sun, Xiaofei Wang, Hong Zhang, A 1.5MSPS, 120 dB SFDR, ±10 V input range SAR ADC with sampling nonlinearity compensation and inherent 2-b coarse ADC for MSBs decision, Microelectronics Journal, Volume 145, 2024, 106128.

• 66. J Y Ji, X A Ji, Z Y Zhou, Z C Dai, X H Chen, J Zhang, Z Jiang, and H Zhang, A 16-bit 18-MSPS flash-assisted SAR ADC with hybrid synchronous and asynchronous control logic[J]. J. Semicond., 2024, 45(6), 062201.
  

• 65. H. Zhang et al., "A 1.25-MHz-BW, 83-dB SNDR Pipelined Noise-Shaping SAR ADC With MASH 2-2 Structure and kT/C Noise Cancellation," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 70, no. 10, pp. 3872-3876, Oct. 2023.

• 64. 张杰, 党莹, 张鸿, 一种具有高阶温度补偿的低温漂高PSRR带隙基准, 微电子学, Vol. 53, 5, 2023: 779. 

• 63. H. Zhang et al., "A 2.5-MHz BW, 75-dB SNDR Noise-Shaping SAR ADC With a 1st-Order Hybrid EF-CIFF Structure Assisted by Unity-Gain Buffer," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 30, no. 12, pp. 1928-1932, Dec. 2022.

• 62. WANG Tonghui, ZOU Jiaxuan, QI Huanhuan, WANG Xi, WANG Jingbo, ZHANG Hong. A Programmable Pre-emphasis Technique with Combined RLC Source Degeneration for High-Speed Serial Link Transmitters[J]. Chinese Journal of Electronics, 2022, 31(1): 52-58.

• 61. LUO Hongrui, ZHAO Xianlong, JIAO Zihao, ZHANG Jie, WANG Xiaofei, ZHANG Ruizhi, ZHANG Hong. A 16-bit, ±10-V Input Range SAR ADC with a 5-V Supply Voltage and Mixed-Signal Nonlinearity Calibration[J]. Chinese Journal of Electronics, 2022, 31(4): 690-697.
  

• 60. Z. Li, L. Dong, H. Li, J. Zhang, X. Wang and H. Zhang, "An Analog Readout Circuit With a Noise-Reduction Input Buffer for MEMS Microphone," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 10, pp. 3983-3987, Oct. 2022.

• 59. 彭帅,石星晨,张杰,齐欢欢,张鸿, 用于传感器信号获取的模数转换器研究进展, 微电子学, Vol. 52, 4, 2022: 525. 

• 58. Hongrui Luo, Lei Dong, Yuwei Wang, Zihao Jiao, Yang Chen, Xiaofei Wang, Hong Zhang, A 1-V 2.69-ppm/°C 0.8-μW bandgap reference with piecewise exponential curvature compensation, Microelectronics Journal, Volume 121, 2022, 105368.

• 57. Z. Huang et al., "A 6-GHz Bandwidth Input Buffer Based on AC-Coupled Flipped Source Follower for 12-bit 8-GS/s ADC in 28-nm CMOS," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, no. 10, pp. 4163-4167, Oct. 2022.

• 56. Y. Wang et al., "A Closed-Loop Neuromodulation Chipset With 2-Level Classification Achieving 1.5-Vpp CM Interference Tolerance, 35-dB Stimulation Artifact Rejection in 0.5ms and 97.8%-Sensitivity Seizure Detection," in IEEE Transactions on Biomedical Circuits and Systems, vol. 15, no. 4, pp. 802-819, Aug. 2021.

• 55. 李致铭,兰哲冲,金楷越,张杰,张鸿.寄生电容自适应抑制的飞法级电容传感器读出电路[J].西安交通大学学报,2021,55(05):154-161

• 54. Xu, J., Yu, Z., Wang, Y. et al. High-sensitivity ultra-low-power electrode resistance monitoring circuit for cardiac pacemakers. Analog Integr Circ Sig Process 109, 479–485 (2021).
  

• 53. Y. Wang, Q. Sun, H. Luo, X. Wang, R. Zhang and H. Zhang, "A 48 pW, 0.34 V, 0.019%/V Line Sensitivity Self-Biased Subthreshold Voltage Reference With DIBL Effect Compensation," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 2, pp. 611-621, Feb. 2020.

• 52. Jiangtao Xu, Yujian Zhai, Yang Yang, Ruizhi Zhang, Hong Zhang, An integrated low-power Binary-PAM based wireless telemetry circuit for implantable cardiac pacemakers, Microelectronics Journal, Volume 99, 2020, 104747.

• 51. Y. Chen, Z. Jiao, W. Guan, Q. Sun, X. Wang, R. Zhang, and H. Zhang, "A +0.66/-0.73 °C Inaccuracy, 1.99-μW, Time-Domain CMOS Temperature Sensor With Second-Order ΔΣ Modulator and On-Chip Reference Clock", in IEEE Transactions on Circuits and Systems I: Regular Papers,vol. 67, no. 11, pp. 3815-3827, Nov. 2020.  

• 50. Z. Jiao, Y. Chen, X. Su, Q. Sun, X. Wang, R. Zhang, and H. Zhang, "A Configurable Noise-Shaping Band-Pass SAR ADC With Two-Stage Clock-Controlled Amplifier," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no.11, pp.3728-3739,Nov. 2020.

• 49. 焦子豪, 张瑞智, 金锴, 盛炜, 张鸿. 用于高速模数转换器的非对称全差分参考电压缓冲器. 西安交通大学学报, 2020, 54(05): 109-116.
  

• 48. 李楠楠,黄正波,季惠才,盛炜,张鸿.用于高速模数转换器的电荷泵型低抖动时钟管理电路. 西安交通大学学报, 2020, 54(1): 162-168.

• 47. Q. Sun, H. Zhang, X. Wang, W. Ma and B. Chen, "Sparsity Constrained Recursive Generalized Maximum Correntropy Criterion with Variable Center Algorithm," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, no. 12, pp. 3517-3521, Dec. 2020.

• 46. Q. Sun, Y. Ma, Z. Ye, X. Wang and H. Zhang, "A Pseudo-Constant Frequency Constant On-Time Buck Converter With Internal Current Ripple Injection and Output DC Offset Cancellation," in IEEE Access. vol. 7, pp. 175443-175453, 2019.

• 45. Y. Wang, Q. Sun, H. Luo, X. Wang, R. Zhang and H. Zhang, "A 48 pW, 0.34 V, 0.019%/V Line Sensitivity Self-Biased Subthreshold Voltage Reference With DIBL Effect Compensation," in IEEE Transactions on Circuits and Systems I: Regular Papers. vol. 67, no. 2, pp. 611-621, Feb. 2020.

• 44. J. Xu, K. He, Y. Wang, R. Zhang and H. Zhang, "A 79.1–87.2 GHz 5.7-mW VCO With Complementary Distributed Resonant Tank in 45-nm SOI CMOS," in IEEE Microwave and Wireless Components Letters, vol. 29, no. 7, pp. 477-479, July 2019. 

• 43. Zhengbo Huang, Hong Zhang*, "Low-Voltage Bulk-Driven High-Speed Comparator for ADCs", Electronics Letters,  vol. 55, no. 13, pp. 735-737, 27 6 2019.

• 42. Hongshuai Zhang, Hong Zhang*, Yan Song and Ruizhi Zhang, "A 10-Bit 200-kS/s 1.76-μW SAR ADC With Hybrid CAP-MOS DAC for Energy-Limited Applications," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 5, pp. 1716-1727, May 2019. 

• 41. Sun, Q.; Zhang, H.*; Zhang, J.; Ma, W*. Adaptive Unscented Kalman Filter with Correntropy Loss for Robust State of Charge Estimation of Lithium-Ion Battery. Energies, 2018, 11, 3123.

• 40. 陈阳,张瑞智,金锴,焦子豪,张鸿*.采用电荷平衡模数转换器的高精度CMOS温度传感器, 西安交通大学学报，vol.52, no.10, pp-, 2018.

• 39. Jie Zhang, Hong Zhang *, Bo Yang, Ruizhi Zhang, "Joint Background Calibration of Gain and Timing Mismatch Errors with Low Hardware Cost for Time-Interleaved ADCs", in IET Circuits, Devices & Systems, vol. 13  no. 2, pp-, 2019.

• 38. Hongshuai. Zhang, Hong Zhang*, Quan Sun, Jijun Li, Xipeng Liu and Ruizhi Zhang, "A 0.6-V 10-bit 200-kS/s SAR ADC With Higher Side-Reset-and-Set Switching Scheme and Hybrid CAP-MOS DAC," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol.56, no.11, pp.3639-3650, Nov. 2018.

• 37. Hong Zhang, Junqiang Sun, Jie Zhang, Ruizhi Zhang, and Anthony Chan Carusone. A Low-Power Pipelined-SAR ADC Using Boosted Bucket-Brigade Device for Residue Charge Processing, inIEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 9, pp. 1763-1776, Sept. 2018.

• 36. Jie Zhang, Hong Zhang*, Quan Sun, Ruizhi Zhang. A Low-Noise, Low-Power Amplifier with Current-Reused OTA for ECG Recordings, in IEEE Transactions on Biomedical Circuits and Systems, Vol.12, no. 3, pp. 700-908, June 2018.

• 35. 李吉军，张瑞智，孙权，张鸿*. 用反相器实现积分的低压低功耗级联型ΔΣ调制器, 西安交通大学学报，vol. 52, no.08, pp110-116, 2018.

• 34. Jie Zhang, Hong Zhang*, Ruizhi Zhang. A High-Efficiency Charge Pump in BCD Process for Implantable Medical Devices, Journal of Semiconductors, 2018, 39(10): 105003.

• 33. 杨洋，张瑞智, 张杰，许江涛，张鸿. 植入式医疗装置的无线通信和能量收集电路，西安交通大学学报，vol.52, no.07, pp.160-166, 2018.

• 32. Hongshuai Zhang, Hong Zhang and Ruizhi Zhang. Energy-efficient higher-side-reset-and-set switching scheme for SAR ADC, Electronics Letters,  2017 , 53 (18) :1238-1240.

• 31. S. Chen, L. Wang, H. Zhang, R. Murugesu, D. Dunwell and A. C. Carusone, "All-Digital Calibration of Timing Mismatch Error in Time-Interleaved Analog-to-Digital Converters," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 9, pp. 2552-2560, Sept. 2017.

• 30. 王玉伟, 张鸿*, 张瑞智. 一种超低功耗的低电压全MOS基准电压源, 西安交通大学学报,  2017,  51(8): 47-52.

• 29. 陈浩 , 孙权, 张鸿*, 程军, 张瑞智. 用于超低频信号测量的高精度低功耗增量式模数转换器, 西安交通大学学报，2017,51(6): 79-85.

• 28. Hong Zhang, Xipeng Liu, Jie Zhang, Hongshuai Zhang, Jijun Li, Ruizhi Zhang,Shuai Chen, Anthony Chan Carusone. A Nano-Watt MOS-Only Voltage Reference with High-Slope PTAT Voltage Generators, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 1, pp1-5, 2018.

• 27. Jie Zhang, Hong Zhang*, Jiangtao Xu, Yang Zhao, Jia Li, Guoyu Hu, Jialu Wang, Ruizhi Zhang and Yong Lian. A Low Energy ASIC for Triple-Chamber Cardiac Pacemakers with Contact Resistance Measurement,Microelectronics Journal, Volume 60, February 2017, Pages 65–74.

• 26. Xiaofei Wang, Hong Zhang*, Jie Zhang, Xin Du, Yue Hao. A SHA-less 14-bit, 100-MS/s pipelined ADC with comparator offset cancellation in background[J].Journal of Semiconductors,2016,37(3):035002-7.

• 25. 张瑶, 张鸿*, 李梁,等. 时钟数据恢复电路中的线性相位插值器[J]. 西安交通大学学报, 2016, 50(2):48-54 .

• 24. Hong Zhang, Xin Du, Yao Zhang, Liao Gong, Jun Cheng. A low-jitter third-order self-biased PLL with adaptive fast-locking scheme for SerDes interfaces, Analog Integrated Circuits and Signal Processing, 2015: 311-321.

• 23. Wang Xiaofei, Zhang Hong, Zhang Jianrong, Li Changyi, Du Xin, Hao Yue. A multi-cell battery pack monitoring chip based on 0.35-mu m BCD technology for electric vehicles, IEICE Eletronics Express, 12(12),2015:1-12.

• 22. 黄嵩人,张鸿,陈珍海,朱泷,于宗光,钱宏文,郝跃.A 10-bit 250 MSPS charge-domain pipelined ADC with replica controlled PVT insensitive BCT circuit[J].Journal of Semiconductors,2015,36(5):055012-7.

• 21. 张鸿,张牡丹,张杰,赵阳, 张瑞智. 用于植入式医疗装置的逐次逼近式模数转换器[J].西安交通大学学报,  2015,49(02):43-48.

• 20. Hong Zhang, Jiezhang, Mudan Zhang, Xue Li, and Jun Cheng.A multifunctional switched-capacitor programmable gain amplifier for high-definition video analog front-ends[J]. Journal of Semiconductors,2015,36(3):035002-7.

• 19. Cheng Jun, Ma Zhen, Zhang Hong*. A voltage mode buck DC-DC converter with automatic PWM/PSM mode switching by  detecting the transient inductor current, Analog Integrated Circuits and Signal Processing,2(80),2014: 243-253.

• 18. Chen Zhenhai*, Huang Songren, Zhang Hong, Yu Zongguang, Ji Huicai, A 27mW 10-bit 125MSPS charge domain pipelined ADC with PVT insensitive boosted charge transfer circuit, Journal of Semiconductors, 34(3),pp.035006-1-8, 2013.

• 17. Chen Zhenhai*, Qian Hongwen, Huang Songren, Zhang Hong, Yu Zongguang, A low power time-interleaved 10-bit 250-MSPS charge domain pipelined ADC for IF sampling, Journal of Semiconductors, 34(6), pp.035006-1-9, 2013. 

• 16. 张鸿, 赵桐, 贺郁, 李浩, 程军*.一种低功耗跨导电阻电容型镜像抑制复数滤波器, 西安交通大学学报, 47(08), pp.80-86，2013.

• 15. Chen Zhenhai*, Yu Zongguang, Huang Songren, Ji Huicai, Zhang Hong, A novel boosted charge transfer circuit for charge domain pipelined ADC, 电子学报 , 21(4), pp.627 -632, 2012.

• 14. Zhenhai Chen, Zongguang Yu, Songren Huang, Hong Zhang, Huicai Ji. A PVT insensitive boosted charge transfer for high speed charge-domain pipelined ADCs, IEICE Electronics Express, 2012.

• 13. Hong Zhang, Xue Li, Suming Lai, Pinyi Ren. A high-linearity 264-MHz source-follower-based low-pass filter with high-Q second-order cell for MB-OFDM UWB.  IEICE Transaction on Electronics,6(E94c), 06, 2011: 99-1007. 

• 12. Liu Jinhua, Chen Guican, Zhang Hong*. A time-variant analysis of phase noise in series quadrature oscillators, [J]. IEICE Trans. Fundamentals, 2011, 2 (E94-A): 574-582.

• 11. Liu Jinhua, Chen Guican, Zhang Hong*. A time variant analysis of phase noise in differential cross-coupled LC oscillators, [J]. IEICE Trans. Fundamentals 2010, 12 (E93-A): 574-582.

• 10. Huai-zhong Hu, Ming-jun Gao, Hong Zhang*. A new algorithm for computing the fuzzy weighted average, IEICE Electronics Express, 19 (7), 2010: 1423-1428.

• 9. 刘金华, 陈贵灿, 张鸿*. 采用冲激敏感函数的差分LC振荡器相位噪声分析, 西安交通大学学报, 12(44), 2010: 66-70.

• 8. 张鸿，陈贵灿，陈亮. 多带OFDM超宽带射频接收机的系统建模与仿真. 系统仿真学报,  21(5), 2009: 2473-2477.

• 7. 杨骁, 陈贵灿, 程军, 张鸿.  一种新型两通道时间交织高阶ΣΔ调制器，西安电子科技大学学报，2009，02.

• 6. Xiao Yang, Hong Zhang, Guican Chen. A low-power second-order two-channel time-interleaved ΣΔ modulator for broadband　applications. IEICE Transaction on Electronics, 6(E92-C), 2009:　852-859.

• 5. Zhang Hong, Chen Gui-Can, Lai Su-Ming, Liu Jin-Hua. A high-gain differential CMOS LNA for 3.1-10.6GHz ultra-wideband receivers. IEICE Electronics Express, 5(15), 2008: 523-529.

• 4. Zhang Hong, Chen Gui-can. Design of a fully differential CMOS LNA for 3.1-10.6 GHz UWB communication systems. Journal of China Universities of Posts and Telecommunications, 15 (4), 2008: 107-111.

• 3. 张鸿, 陈贵灿, 程军, 贾华宇.  流水线模数转换器中高速低功耗开环余量放大器的设计，西安交通大学学报，2008，06.

• 2. 贾华宇, 陈贵灿, 程军, 张鸿, 沈磊. 流水线模数转换器的一种数字校准技术，西安交通大学学报，2008，08.

• 1. 张鸿，陈贵灿. “一种高线性度2.4 GHz CMOS LC压控振荡器”, 微电子学与计算机， 2007, 24(7):176-179.

Conference Papers:

• 47. Y. Li et al., "A 108.9dB-DR, 2-2 MASH ADC Featuring a Nested Gainboosting FIA with Gm Enhancement in Settling Phase Through Stepwise Charge Sharing," 2026 IEEE Custom Integrated Circuits Conference (CICC), Seattle, WA, USA, 2026.

• 46. Y. Li et al., "A 105.8-dB DR Continuous-Time Delta-Sigma Modulator with SH-free Quantizer and PVT-adaptive Negative-R," 2026 IEEE Custom Integrated Circuits Conference (CICC), Seattle, WA, USA, 2026. 

• 45. R. Wang, Z. Tian, J. Huang, H. Zhang and Y. Wang, "Automated Design of a 22–41-GHz Phased Array TRX Front-End with Adaptive Analog Temperature Compensation for Multi-Band 5G Communications," 2026 IEEE Custom Integrated Circuits Conference (CICC), Seattle, WA, USA, 2026.

• 44. N. Li et al., "An Input Buffer with Replica-Based Nonlinearity Compensation for High-Speed ADCs," 2025 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), Macao, China, 2025, pp. 55-56.

• 43. Y. Wang et al., "A Low-Power Mixed-Signal ASIC for Cardiac Resynchronization Therapy Pacemakers with a Quadripolar Left Ventricle Lead," 2025 IEEE Biomedical Circuits and Systems Conference (BioCAS), Abu Dhabi, United Arab Emirates, 2025, pp. 349-353.
  

• 42. X. Yang, J. Ji, Z. Jiao, S. Hu, X. Wang and H. Zhang, "Full-CDAC Background Calibration Leveraging Bridge-Crossing Shuffling for a 1.8 MS/s 20-bit SAR ADC," 2025 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), Macao, China, 2025, pp. 33-34.

• 41. B. Huang, Y. Hao, J. Zhang, R. Wang and H. Zhang, "A 2.16 μ W Chopper Amplifier with a Feedforward SAR ADC Assisted Mixed-Signal DC-Servo Loop Achieving ±1V DC Offset Cancellation in 2.1s and 1Vpp CM Interference Tolerance for Neural Signal Acquisition," 2025 IEEE Asian Solid-State Circuits Conference (A-SSCC), Daejeon, Korea, Republic of, 2025, pp. 361-363.

• 40. J. Ji et al., "An OTA with Series-Cascode-Miller Compensation and Anti-Pole-Splitting for a 360-MHz BW Low-Distortion TIA in Sub-6G Broadband RF Receivers," 2025 IEEE International Symposium on Circuits and Systems (ISCAS), London, United Kingdom, 2025, pp. 1-5.

• 39. Y. Ge, Z. Jiang, Y. Fu, Y. Zhang, J. Wang and H. Zhang, "A 1.08pJ/bit DisplayPort RX with Combined AFE Offset Cancellation and Training-Less Link Setup," 2024 21st International SoC Design Conference (ISOCC), Sapporo, Japan, 2024, pp. 33-34.

• 38. C. Zheng et al., "A Low-Power Command-Driven SAR ADC for Implantable Cardiac Pacemakers," 2024 IEEE Biomedical Circuits and Systems Conference (BioCAS), Xi'an, China, 2024, pp. 1-4.

• 37. Yuyuan Wang et al., "A 590-nA Fully-Integrated AFE Including a CSCCIA with SC Ripple Rejection and a Configurable SC-BPF for Implantable Cardiac Pacemakers," 2024 IEEE Biomedical Circuits and Systems Conference (BioCAS), Xi'an, China, 2024, pp. 1-5.

• 36. X. Zhang, C. Dai, C. Yang, Y. Zhao, H. Zhang and J. Zhang, "A Compact Multi-Channel Neural Stimulator with a High-Efficiency Wireless Power and Data Transfer System for Batteryless Invasive BCIs," 2024 IEEE Biomedical Circuits and Systems Conference (BioCAS), Xi'an, China, 2024, pp. 1-5.
  

• 35. F. Li, J. Xu, Y. Wang and H. Zhang, "Ultra-Low Power Robust Digital Pulse Width Modulation Circuit for Pacemaker Telemetry," 2024 IEEE Biomedical Circuits and Systems Conference (BioCAS), Xi'an, China, 2024, pp. 1-5.
  

• 34. N. Li, Z. Huang, J. Zhang, Q. Sun, J. Luo and X. Wang, "A 9 b 4 GS/s Time-Domain ADC with Self-Reset VTC and Switched-RO TDC Including 8x Hybrid Interpolation," 2023 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), Hefei, China, 2023, pp. 170-171.

• 33. Z. Jiao, H. Luo, J. Zhang, X. Wang, L. Chen and H. Zhang, "An 84dB-SNDR 1-0 Quasi-MASH NS SAR with LSB Repeating and 12-bit Bridge-Crossing Segmented CDAC," 2023 IEEE Custom Integrated Circuits Conference (CICC), San Antonio, TX, USA, 2023, pp. 1-2.

• 32. Yuyuan. Wang et al., "A PMOS-based Programmable Stimulator with Adaptive Charge Pump for Cardiac Pacemakers," 2023 IEEE Biomedical Circuits and Systems Conference (BioCAS), Toronto, ON, Canada, 2023, pp. 1-4.
  

• 31.  L. Tang, R. Yang, H. Zhang and J. Zhang, "A Wireless Power and Bidirectional Data Telemetry Prototype Using a Single Inductive Link for Biomedical Implants," 2023 IEEE Biomedical Circuits and Systems Conference (BioCAS), Toronto, ON, Canada, 2023, pp. 1-5.

• 30.  X. Ji et al., "A 16-Bit 18-MSPS SAR ADC with Hybrid Synchronous and Asynchronous Control Logic," 2023 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), Hefei, China, 2023, pp. 74-75.

• 29. H. Zhang, N. Li, Z. Jiao, J. Zhang, X. Wang and H. Zhang, "A 1st-Order Passive Noise-Shaping SAR ADC with Improved NTF Assisted by Comparator Gain Calibration," 2021 IEEE International Symposium on Circuits and Systems (ISCAS), Daegu, Korea, 2021, pp. 1-5

• 28. J. Wang, T. Wang, X. Yang and H. Zhang, "A Low-Noise Analog Frontend with Large PD Capacitance Tolerance in 65-nm CMOS for Optical Receivers," 2021 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), Zhuhai, China, 2021, pp. 86-87.

• 27. Yuwei Wang, Quan Sun, Hongrui Luo, Xinlei Chen, Xiaofei Wang, Hong Zhang. A Closed-Loop Neuromodulation Chipset with 2-Level Classification Achieving 1.5Vpp CM Interference Tolerance, 35dB Stimulation Artifact Rejection in 0.5ms and 97.8% Sensitivity Seizure Detection, International Solid-State Circuits Conference (ISSCC), February 15-19, 2020.

• 26. Yizhen Wang, Yiwen Yin, Ruizhi Zhang, Hong Zhang.  Fully-Integrated Kinetic Energy Harvesting Circuit with a Transposed Hybrid Series-Parallel SC DC-DC, 2019 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA), Chendu, China, Nov. 13-15, 2019.

• 25. Hongrui Luo, Quan Sun, Ruizhi Zhang and Hong Zhang, A 1-V 3.1-ppm/°C 0.8-µW Bandgap Reference with Piecewise  Exponential Curvature Compensation, 2018 IEEE Asian Solid-State Circuits Conference (A-SSCC 2018) ,Tainan, Taiwan China, pp.97-98  Nov.05~07. 

• 24. Yuwei Wang, Ruizhi Zhang, Quan Sun and Hong Zhang. A 0.5 V, 650 pW, 0.031%/V Line Regulation Subthreshold Voltage Reference, 2018 IEEE European Solid-State Circuits Conference (ESSCIRC 2018) , Dresden, Germany, pp-.  Sept.03~06. 

• 23. Hongshuai Zhang, Hong Zhang, Yan Song, Ruizhi Zhang.A 10-bit 200-kS/s 1.76-μW SAR ADC with Hybrid CAP-MOS DAC for Energy-Limited Applications, 2018 IEEE International Symposium of Circuits and Systems (ISCAS), Florence, Italy, pp. 1-5.

• 22. Jie Zhang, Hong Zhang, Ruizhi Zhang, Jiangtao Xu, Yang Zhao, Mudan Zhang, Jia Li.A Mixed-Signal ASIC for Triple-Chamber Cardiac Pacemakers with Heart Resistance Measurement, IEEE Asian Solid-State Circuit Conference (A-SSCC), 2015, 33-36.

• 21. C. Guo, H. Zhang, Z. Ma, J. Zhang, J. Lin and R. Zhang, "An inductive wireless telemetry circuit with OOK modulation for implantable cardiac pacemakers," 2015 IEEE 11th International Conference on ASIC (ASICON), Chengdu, 2015, pp. 1-4.

• 20. Hong Zhang, Dong Li, Qing Wang,Jie Zhang, Chong Li,Ruizhi Zhang. A resistor-less bandgap reference with improved PTAT generator for ultra-low-power LSIs, 2014 IEEE Faible Tension Faible Consommation (FTFC), pp.1,4, 4-6 May 2014.

• 19. Dong Li, H. Zhang, Qing Wang, Xiaowei Wang, Ang Gao and Jun Cheng, "A negative voltage generator for the sample-and-hold circuit in charge-domain pipelined ADCs," 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Guilin, 2014, pp. 1-3.

• 18. X. Wang, H. Zhang, D. Li, J. Cheng and R. Zhang, "Nonlinearity analysis of the boosted bucket brigade device for high-speed charge-domain ADCs," 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Guilin, 2014, pp. 1-3.

• 17. A. Gao, H. Zhang, H. Mao, D. Li, M. Zhang and J. Cheng, "A 1.6–10.9 GHz voltage-controlled ring oscillator for the serial interface of high-speed data converters," 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Guilin, 2014, pp. 1-3.

• 16. X. Wang, H. Zhang, L. Zhang, J. Zhang and Y. Hao, "A daisy-chain SPI interface in a battery voltage monitoring IC for electric vehicles," 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Guilin, 2014, pp. 1-3.

• 15. X. Wang, H. Zhang, G. Yang, C. Li and Y. Hao, "A 12-bit incremental ΣΔ ADC for battery management system in electric vehicles," 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Guilin, 2014, pp. 1-3.

• 14. J. Cheng, L. Si, H. Zhang, X. Weng, Z. Chen and Z. Pu, "A low-power clock generator based on digital DLL for high speed pipelined ADCs," 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Xi'an, 2012, pp. 1-3.

• 13. S. Zhu, H. Zhang, X. Li, D. Li, Z. Chen and J. Cheng, "A PVT insensitive BCT circuit with replica calibration for high speed charge-domain pipelined ADCs," 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Xi'an, 2012, pp. 1-3.

• 12. H. Zhang, X. Li, Y. Chen and J. Cheng, "A switched-capacitor programmable-gain amplifier for high-definition video analog front-ends," 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Xi'an, 2012, pp. 1-3.

• 11. H. Zhang, X. Weng, Y. Chen, X. Li, J. Cheng and R. Li, "A differential voltage reference generator for pipelined ADCs," 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Xi'an, 2012, pp. 1-3.

• 10. Hao Li, Hong Zhang*, Xunwei Weng, Ruizhi Zhang. A low-power Gm-R-C image rejection filter for complex low-IF Receiver. IEEE International Conference on ASIC, 2011: 1071-1074.

• 9. Hong Zhang, Yangyang Niu, Shengdong Tang, Ruizhi Zhang, Guican Chen. A 3.1—10.6GHz Frequency Synthesizer for MB-OFDM UWB Transceivers, International Symposium on Signals, Systems and Electronics, 2010: 357-360.

• 8. Suming Lai, Hong Zhang, Guican Chen, Jianchao Xu. An improved source follower with wide swing and low output impedance.　Proceedings of IEEE Asia-Pacific Conference on Circuits and Systems (APCCAS), 2008: 814-817.

• 7. Hong Zhang，Guican Chen. Analysis and Design of a CMOS Low Noise Amplifier for 3-5 GHz UWB Systems. International Conference on Microwave and Millimeter Wave Technology, (ICMMT), 2007:748-751.

• 6. Hong Zhang, Guican Chen, Jun Chen, Huayu Jia. A Low-Power, High-Speed Open-Loop Residue Amplifier for Pipelined ADCs with Digital Calibration. Proceedings of the International Conference on ASIC ,2007: 469-472.

• 5. Hong Zhang， Guican Chen，Xiao Yang. Fully Differential CMOS LNA and Down-Conversion Mixer for 3－5 GHz MB-OFDM UWB Receivers. IEEE International Workshop on Radio-Frequency Integration Technology (RFIT), 2007:48-51.

• 4. Yang. Xiao, Chen Guican, Cheng Jun, Zhang Hong. A novel double-sampling sigma-delta modulator architecture for broadband applications, Proceedings of the International Conference on ASIC（ASICON）, 2007: 281-284.

• 3. Yang. Xiao, Chen. Guican, Cheng. Jun, Zhang Hong, A novel cascade sigma-delta modulator architecture for broadband applications, Proceedings of the International Symposium on Communications and Information Technologies, 2007:101-105.

• 2. Hong Zhang, Guican Chen, NingLi. A 2.4-GHz Linear-tuning CMOS LC Voltage-controlled Oscillator, Proceedings of the 2005 Asia and South Pacific Design Automation Conference (ASP-DAC), 2005: 799-802.

• 1. Hong Zhang, Guican Chen. A Monolithic Fast-Hopping Frequency Synthesizer for MB-OFDM UWB, Asia-Pacific Microwave Conference Proceedings (APMC), 2005: 892-895.