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  • 教师姓名: 王瑞涛
  • 性别: 男
  • 职称: 助理教授
  • 在职信息: 在职
  • 硕士生导师: 是
  • 学历: 直博
  • 学位: 博士
  • 所在单位: 微电子学院
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研究方向及已发表论文

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研究方向:

  1. 射频毫米波集成电路设计

  2. AI驱动模拟射频集成电路设计

  3. 数模混合集成电路设计

已发表论文(*为通讯作者):

  1. Wang R, Tian Z, Huang J, Zhang H, Wang Y. Automated Design of a 22–41-GHz Phased Array TRX Front-End with Adaptive Analog Temperature Compensation for Multi-Band 5G Communications[C]. 2026 IEEE Custom Integrated Circuits Conference (CICC), 2026.

  2. Wang R, Li C, Qiu K, Liu Y, Yin S, Wang Y. A Ka-Band Broadband Power Amplifier With Transformer-Based Lossy Magnetically Coupled Resonator Network: Analysis and Design[J]. IEEE Transactions on Microwave Theory and Techniques, 2024, 72(12): 6857-6870.

  3. Dong L, Chen Y, Jiang Z, Wang R*, Zhang J, Li R, Zhang H. A 1.9 ppm/°C Opamp-Less Bandgap Reference with a Stacked ΔVBE Structure for High-Order Curvature Compensation[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2026: 1-5.

  4. Wang R, Tian Z, Li C, Rao Z, Zhang H, Wang Y. A 24–32-GHz In-Band Full-Duplex T/R Front End With Electrical Balance Duplexer in 65-nm CMOS[J]. IEEE Microwave and Wireless Technology Letters, 2025: 1-4.

  5. Wang R, Li C, Wang Y. A Broadband Variable-Gain Low-Noise Amplifier With Low NF and Dual Phase Compensation[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2024, 71(9): 4086-4090.

  6. Wang R, Zhu W, Wang Y. An Adaptive Analog Temperature Compensated W-Band Front-End With ±0.0033 dB/°C Gain Variation Across −30 °C to 120 °C[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2024, 71(2): 542-546.

  7. Wang R, Li C, Zhang J, Yin S, Zhu W, Wang Y. A 18–44 GHz Low Noise Amplifier With Input Matching and Bandwidth Extension Techniques[J]. IEEE Microwave and Wireless Components Letters, 2022, 32(9): 1083-1086.

  8. Wang R, Li C, Wang Y. An Improved Through-Only De-Embedding Method for 110-GHz On-Wafer RF Device Characterization[J]. IEEE Microwave and Wireless Components Letters, 2022, 32(10): 1219-1222.

  9. Wang R, Wang Z, Yin S, Zhang J, Wang Y. A Fully Integrated X-Band Phased-Array Transceiver in 0.13-μm CMOS Technology[C]//2021 IEEE International Symposium on Radio-Frequency Integration Technology. Hualien, Taiwan: IEEE, 2021: 1-3.

  10. Huang J, Tian Z, Wang R*, Zhang H. A Parasitic-Aware End-to-End Automated Optimization Scheme for mm-Wave Circuits Based on an Offline Passive Library[C]//2026 IEEE International Conference on Microwave and Millimeter Wave Technology, 2026: 1-3.

  11. Zhu W, Wang R, Zhang J, Wang J, Li C, Wang Y. An Ultra-compact Bidirectional T/R Folded 25.8-39.2GHz Phased-Array Transceiver Front-End with Embedded TX Power Detection/Self-calibration Path Supporting 64-/256-/512-QAM at 28-/39-GHz band for 5G in 65nm CMOS Technology[C]//2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). Honolulu, HI, USA: IEEE, 2022: 102-103.

  12. Yin S, Wang R, Zhang J, Liu X, Wang Y. Automatic Design for W-Band Front-End System via Bottom-Up Sizing and Layout Generation[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024, 43(3): 705-715.

  13. Yin S, Wang R, Zhang J, Liu X, Wang Y. Fast Surrogate-Assisted Constrained Multiobjective Optimization for Analog Circuit Sizing via Self-Adaptive Incremental Learning[J]. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023, 42(7): 2080-2093.

  14. Yin S, Wang R, Zhang J, Wang Y. Asynchronous Parallel Expected Improvement Matrix-Based Constrained Multi-Objective Optimization for Analog Circuit Sizing[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 2022, 69(9): 3869-3873.

  15. Li C, Wang R, Zhang J, Zhu W, Wang Y. A Compact Broadband Power Amplifier Covering 23-39 GHz for 5G Mobile Communication[C]//2022 IEEE International Symposium on Radio-Frequency Integration Technology. Busan, Korea, Republic of: IEEE, 2022: 9-11.

  16. Zhu W, Wang J, Wang R, Zhang J, Li C, Yin S, Wang Y. A 1V 32.1 dBm 92-to-102GHz Power Amplifier with a Scalable 128-to-1 Power Combiner Achieving 15% Peak PAE in a 65nm Bulk CMOS Process[C]//2022 IEEE International Solid-State Circuits Conference (ISSCC). San Francisco, CA, USA: IEEE, 2022: 318-320.

  17. Zhu W, Wang J, Wang R, Wang Y. 14.5 A 1V W-Band Bidirectional Transceiver Front-End with <1dB T/R Switch Loss, <1°/dB Phase/Gain Resolution and 12.3% TX PAE at 15.1dBm Output Power in 65nm CMOS Technology[C]//2021 IEEE International Solid-State Circuits Conference (ISSCC). San Francisco, CA, USA: IEEE, 2021: 226-228.

  18. Li Y, Chen Y, Ji J, Pan R, Li Z, Wang R, Zhang J, Zhang H. A 105.8-dB DR Continuous-Time Delta-Sigma Modulator with SH-free Quantizer and PVT-adaptive Negative-R[C]//2026 IEEE Custom Integrated Circuits Conference (CICC). IEEE, 2026: 1-4.

  19. Ji X, Zhang J, Zhang L, Zheng C, Wang R, Wang X, Zhang H. A Low-Power Light-to-Digital Converter Using Integrating-Capacitor-Reused Pseudo-Differential Frontend for Self-Ambient Light Cancellation[J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2026, 34(10): 3388-3392.

  20. Huang B, Hao Y, Zhang J, Wang R, Zhang H. A 2.16 μW Chopper Amplifier with a Feedforward SAR ADC Assisted Mixed-Signal DC-Servo Loop Achieving ±1V DC Offset Cancellation in 2.1s and 1Vpp CM Interference Tolerance for Neural Signal Acquisition[C]//2025 IEEE Asian Solid-State Circuits Conference (A-SSCC). Daejeon, Korea, Republic of: IEEE, 2025: 361-363.

  21. Zhang J, Zhai M, Wang D, Liu Y, Yi X, Wang R, Zhu W, Wang Y. Design of Compact Bidirectional Amplifier Utilizing Transformers-Stacking Technique[J]. IEEE Transactions on Microwave Theory and Techniques, 2025, 73(4): 1951-1963.

  22. Qiu K, Li C, Liu Y, Wang R, Zhang J, Wang Y. A 2-18G Multi-Stage Distributed Amplifier Using Chebyshev Matching Network for Efficiency Enhancement[C]//2024 IEEE International Symposium on Radio-Frequency Integration Technology. Chengdu, China: IEEE, 2024: 1-3.

  23. Zhang J, Zhu W, Wang D, Yi X, Wang R, Wang Y. A Ka-Band Mutual Coupling Resilient Balanced PA with Magnetic Coupling Self-Cancelling Inductor Achieving 21.2dBm OP1dB and 27.6% PAE1dB[C]//2023 IEEE Asian Solid-State Circuits Conference (A-SSCC). Haikou, China: IEEE, 2023: 1-3.

  24. Wang D, Zhang J, Wang R, Li C, Wang Y. A 5 to 11.1 GHz Quad-Core Quad-Mode Octave Tuning-Range CMOS LC VCO[C]//2023 IEEE International Symposium on Radio-Frequency Integration Technology. Cairns, Australia: IEEE, 2023: 29-31.

  25. Li C, Yin S, Wang R, Zhang J, Zhu W, Wang Y. Modeling and Analysis of T-coils with Improved Quality Factor by Patterned Floating/Ground Shields in Millimeter-Wave Regime[C]//2023 International Symposium of Electronics Design Automation. Nanjing, China: IEEE, 2023: 390-395.

  26. Zhang J, Zhu W, Wang R, Li C, Wang D, Yin S, Wang Y. An Ultra-Compact Bidirectional Ka-Band Front-End Module With 3.8-dB NF and 13.5-dBm OP1dB[J]. IEEE Microwave and Wireless Technology Letters, 2023, 33(1): 70-73.

  27. Zhang J, Zhu W, Wang R, Li C, Yin S, Wang Y. An Ultra-compact Bidirectional Ka-Band Front-End Module with 4.0-dB NF and 13.5-dBm OP1dB[C]//2022 IEEE International Symposium on Radio-Frequency Integration Technology. Busan, Korea, Republic of: IEEE, 2022: 24-26.

  28. Zhu W, Zhang J, Wang J, Wang R, Li C, Wang K, Wang Y. A Packaged 90-to-96GHz 16-Element Phased Array with 18.8/15.8dBm Psat/OP1dB, 14.8% TX PAE in 65nm CMOS Process and +51dBm Array EIRP[C]//2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). Honolulu, HI, USA: IEEE, 2022: 128-129.

  29. Wang Z, Hu W, Zhou J, Zhang W, Wang R, Zhang J, Dou D, Ye Z, Wang Y. Building Post-layout Performance Model of Analog/RF Circuits by Fine-tuning Technique[C]//2022 23rd International Symposium on Quality Electronic Design. Santa Clara, CA, USA: IEEE, 2022: 1-6.

  30. Yin S, Hu W, Zhang W, Wang R, Zhang J, Wang Y. An Efficient Kriging-based Constrained Multi-objective Evolutionary Algorithm for Analog Circuit Synthesis via Self-adaptive Incremental Learning[C]//2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC). Taipei, Taiwan: IEEE, 2022: 74-79.

  31. Wang Z, Hu W, Yin S, Wang R, Zhang J, Wang Y, Ye Z. Building a post-layout simulation performance model with global mapping model fusion technique[J]. Tsinghua Science and Technology, 2022, 27(3): 512-525.

  32. Wang J, Zhu W, Wang R, Wang Y. A Dual-Mode W-Band Eight-Way Parallel–Series Power-Combining PA With +18-dBm Psat and 15.1% PAE in 65-nm CMOS Technology[J]. IEEE Microwave and Wireless Components Letters, 2022, 32(2): 149-152.

  33. Wang Z, Hu W, Gu Z, Zhang W, Yin S, Wang R, Zhang J, Wang Y. Large-scale Integrated Circuits Simulation Based on CNT-FET Model[C]//2021 International Conference on IC Design and Technology. IEEE, 2021: 1-4.

  34. Yin S, Hu W, Zhang W, Wang R, Zhang J, Wang Y. An efficient optimization method of RF passive components using RBF model[C]//2021 IEEE 14th International Conference on ASIC. Kunming, China: IEEE, 2021: 1-4.

  35. Yin S, Zhang W, Hu W, Wang Z, Wang R, Zhang J, Wang Y. An Efficient Reference-point Based Surrogate-assisted Multi-objective Differential Evolution for Analog/RF Circuit Synthesis[C]//2021 IEEE International Symposium on Radio-Frequency Integration Technology. Hualien, Taiwan: IEEE, 2021: 1-3.

  36. Yin S, Hu W, Wang R, Wang Z, Zhang J, Wang Y. Surrogate-Assisted Multi-objective Differential Evolution based on Gaussian Process for Analog Circuit Synthesis[C]//SMACD / PRIME 2021; International Conference on SMACD and 16th Conference on PRIME. IEEE, 2021: 1-4.

  37. Wang J, Zhu W, Wang R, Wang Y. An Ultra-Compact W-band Front-End With Coupled-Line-Based Matching Network Reused T/R Switch Achieving 13.4-dBm Psat and <2-dB Switch Loss in 65-nm CMOS Technology[J]. IEEE Solid-State Circuits Letters, 2021, 4: 105-108.

  38. Zhu W, Wang J, Wang R, Wang Y. An Ultra-Compact 84.9-107GHz LNA with 4.9dB NF by Utilizing Coupled-line-based Gm-Boosting and Noise-Canceling Techniques in 65-nm CMOS Technology[C]//2021 IEEE Custom Integrated Circuits Conference (CICC). Austin, TX, USA: IEEE, 2021: 1-2.

  39. Zhu W, Wang J, Wang R, Wang Y. A Dual-Mode 24-32 GHz 4-Element Phased-Array Transceiver Front-End with SSA Beamformer for Autonomous Agile Unknown Signal Tracking and Blocker Rejection within <0.1 us and 21.3%/15% Transmitter Peak/OP1dB PAE[C]//2021 IEEE Custom Integrated Circuits Conference (CICC). Austin, TX, USA: IEEE, 2021: 1-2.