Name: JiangtaoXu Gender: Male
Languages: English and Chinese Data of Birth: Aug. 1983
Degree: Ph.D (Awarded Date: Sep. 29, 2011)
Major: Microelectronics and Solid-State Electronics
Mailing Address: Dept. of Microelectronics, Xi’an Jiaotong University, Xi’an 7100149, P. R. China
2001.9– 2005.7 B.Sc., Department of Electronic Science and Technology, Xi’an Jiaotong University.
2005.9–2007.3 Master, Microelectronics and Solid-State Electronics, Xi’an Jiaotong University
2007.3– 2011.9 Ph.D, Microelectronics and Solid-State Electronics Xi’an Jiaotong University
2008.9– 2010.9 Studied abroad at Queen’s University, Canada as a visiting research graduate student. Four chips has been fabricated and measured (Sponcered by Chinese Scholarship Council)
RFIC design /RF Transceiver for Wireless communication applications
Analog/ Mixed signal circuits design
Software Defined Radio
Research Project Experiences (sponsors listed)
2006.07-2006.11: 12bits 40MHz Pipeline ADC (Huawei Technologies Co. Ltd.).
My main work was the back-end layout design, post-simulation and verification.
2006.11-2007.03: Research and Design of Monolithic CMOS RF Transceiver for UWB Wireless Communication Systems (Applied Materials Innovation Fund).
The system-level design and analysis work had equipped me with adequate knowledge about UWB protocol, operation principle and transceiver architecture. I have studied the UWB transceiver topology and simulated it in ADS.
2007.03-2008.07: Research and Design of CMOS RF Receiver for GPS with self-owned intellectual property rights in China (Xi’an Huaxun Microelectronics Inc.)
The success of receiver design and measurement gave me an in-depth knowledge in transceiver topologies, computation and trade-offs of all the system parameters. Meanwhile simulation of every building-block and the design of polyphase filter make me learn many considerations and methodology in circuits design. The experience has shown me a clear picture of design of wireless communication RF transceiver.
2008.09-2011.06: Research of the High-Speed OTA and Current-Domain Key Circuits in Radio-Frequency Integrated Circuits (Ph.D Thesis)
1) A novel CMOS OTA is proposed. Using capacitive cross-coupled feedforward regulated cascode technique and PMOS-type active inductor load, it shows the excellent properties of ultra-wideband, high speed, high linearity and wide transconductance tuning range.
2) A new reconfigurable multi-mode direct-digital modulator is proposed，which can be reconfigured between 4 QAM, 16 QAM and higher modulation formats. It is based on the current vector sum, and first utilize two high-speed OTAs to generate a set of quadrature basis current vectors whose amplitudes are controlled through the dc bias of the amplifiers. A pair of vectors are selected by the switch network to be added in the current domain to reduce the nonlinearity. The error vector magnitude (EVM) is 6.20% at 5.4 GHz carrier frequency in 16-QAM state;
3) The proposed differential active inductor (AI) constructed by only two high-linearity OTAs exhibits wider input dynamic range, which will further boost the ouput power of the AI-based VCO. Also, the improvement in the resisitor-feedback mode enlarges the AI tuning range. This AIVCO shows a frequency tuning range of 127% from 833MHz to 3.72GHz. It produces -0.9dBm of RF power which denotes a DC-to-RF power efficiency of 6.25% and is the highest reported to date for AIVCOs.
4) A broadband downconverter mixer using an OTA as the RF transconductor stage is proposed and fabricated. The mixer’s conversion gain can be varied from 17 dB down to 1.2 dB over a 12 GHz bandwidth. The minimum and maximum power consumption are only 1.8mW and 5.9mW, respectively. The IP1dB and IIP3 are as high as -7 dBm and +7 dBm, respectively, when the conversion gain is set at 13.8 dB.
5) A CMOS wideband front-end IC is demonstrated. It consists of the low noise transconductance amplifier (LNTA) and direct RF sampling mixer (DSM) with embedded charge-domain discrete-time filtering, and aims for multi-band applications. The measured NF of the front-end is below 7 dB throughout the whole band from 0.5 to 6 GHz. It shows a conversion gain of 12.6 dB and IP1dB of -7.5 dBm at 2.4 GHz.
RF/microwave design tools for both IC designs:ADS, Cadence, IE3D, PSPICE, Matlab etc.
Familiar IC technologies: TSMC 0.18um IBM 0.13um CMOS technology;
On-wafer and PCB RF/microwave measurement skills;
Digital design languages/tools: VHDL, ModelSim, and Cadence;
 Jiang-Tao Xu, Carlos E. Saavedra, and Gui-Can Chen, A 12 GHz-Bandwidth CMOS Mixer with Variable Conversion Gain Capability[J]. IEEE Microwave and Wireless Components Letters, 2011, 21 (10) , pp.565-567, 2011.
 Jiang-Tao Xu, Carlos E. Saavedra, and Gui-Can Chen, An Active Inductor-Based VCO with Wide Tuning Range and High DC-to-RF Power Effciency[J]. IEEE Transactions on Circuits and Systems II: Express Briefs., 2011, 58 (8) , pp. 462-466. This was the #1 downloaded paper in the IEEE TCAS-II for the month of August 2011.
 Jiang-Tao Xu，Carlos E. Saavedra，Gui-Can Chen，A Multi-Mode QAM Direct-Digital Modulator based on Current Vector Sum [J]. Chinese Journal of Electronics，40 (1): 40-46, 2012.
 Jiang-Tao Xu, Carlos E. Saavedra, and Gui-Can Chen, A CMOS wideband front-end chip using direct RF sampling mixer with embedded discrete-time filtering[J]. Chinese Journal of Semiconductor, 2011,32(8) , pp.085008-7.
 Jiang-Tao Xu, Carlos E. Saavedra, and Gui-Can Chen, 5.4 GHz Reconfigurable Quadrature Amplitude Modulator using Very High-Speed OTA's[C]. IEEE International Microwave Symposium, Baltimore, USA, June 2011, pp. 1 –4.
 Jiang-Tao Xu, Carlos E. Saavedra, and Gui-Can Chen, Wideband microwave OTA with tunable transconductance using feedforward regulation and an active inductor load[C]. 2010 8th IEEE International NEWCAS Conference, Montreal, Canada, June 2010, pp. 93 –96.
 Jiangtao Xu, Carlos E. Saavedra, and Guican Chen, Noise Analysis of the CG-CS Low Noise Transconductance Amplifier[C]. 2011 7th IEEE International Conference on Electron Device and Solid-State Circuits, Tianjin, China, November 2011.