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  • 教师姓名: 韦玉麒
  • 性别: 男
  • 职称: 教授
  • 博士生导师: 是
  • 硕士生导师: 是
  • 学历: 博士研究生毕业
  • 学位: 博士
  • 所在单位: 电气工程学院
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  • 办公地点: 兴庆校区:东一楼西140
    创新港校区:3号巨构3-3201

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团队论文被IEEE Transactions on Power Electronics期刊录用

发布时间:2026-09-13
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发布时间:
2026-09-13
文章标题:
团队论文被IEEE Transactions on Power Electronics期刊录用
内容:

    团队论文“A Co-Design Methodology for LLC Resonant Converters Considering Both Steady State and Dynamic Performance”被IEEE Transactions on Power Electronics期刊录用(中科院一区TOP期刊)。其中学生张硕是该论文的第一作者。论文摘要如下:

    Abstract: Resonant tank parameters critically influence both steady state and dynamic performance of LLC resonant converters. However, conventional design methodologies often overlook dynamic behavior during the design stage. To address this limitation, this paper proposes a co-design methodology for LLC converters that simultaneously considers steady state and dynamic performance. Based on an accurate dynamic time domain model, the influence of resonant tank parameters on both steady state and small signal characteristics is comprehensively analyzed. To enable a fair quantitative assessment of dynamic performance, the worst-case operating condition for compensator design is identified, and the maximum achievable loop gain crossover frequency under this condition is adopted as the performance metric. A hierarchical design procedure is then developed, in which the feasible design space is progressively narrowed by steady state constraints and dynamic performance requirement. Within the reduced design space, a multi objective optimization is performed to obtain the Pareto-optimal trade-off between root-mean-square (RMS) current and loop gain crossover frequency. The proposed method is verified on a 1 kW prototype. Compared with a steady-state-oriented conventional design, the proposed approach achieves more than double the crossover frequency, reduces voltage overshoot/sag by 15%-46%, and shortens the settling time by 20%-56%, with a 0.50% peak efficiency sacrifice.